1. Field of the Invention
The present invention relates to a thin film transistor device and a method of manufacturing the same.
2. Description of Related Art
Along with recent full-fledged developments in advanced information society or rapid popularization of a multimedia system, a high priority has been put on liquid crystal display devices or organic Electro Luminescence (EL) display devices. As pixels of such display devices or peripheral circuit driving transistors, thin film transistors (TFTs) have been widely used.
The TFTs have been roughly classified into two types, an amorphous silicon TFT and a polycrystalline silicon TFT. The polycrystalline silicon has carrier mobility about two digits higher than that of the amorphous silicon. Hence, a TFT performance can be improved. On the other hand, the polycrystalline silicon should be manufactured at as high temperature as about 1000° C., and a quartz glass substrate, not glass substrate, needs to be used as an insulating substrate. Thus, its drawback is a manufacturing cost. However, developments of low-temperature process bring about low-temperature polycrystalline silicon TFTs that overcome the above problem, and contribute to the manufacture of large-size or high-definition display devices.
In general, the low-temperature polycrystalline silicon TFT is manufactured by forming a silicon layer including a source region, a drain region, and a channel region on an insulating substrate, forming a gate insulating layer on the silicon layer, and forming a gate electrode on the gate insulating layer. Further, formed on the gate electrode is an interlayer insulating layer covering the gate electrode and the gate insulating layer. A line connected with a source region, a drain region, and a gate electrode through a contact hole passed through the interlayer insulating layer and its underlying gate insulating layer. In addition, an upper insulating layer covering the line and the interlayer insulating layer is formed on the line.
A typical example of the aforementioned insulating substrate is glass. Under this constraint, the low-temperature polycrystalline silicon TFT needs to be formed at a temperature not higher than about 600° C. as a strain point of glass. However, such low-temperature process tends to cause dangling bonds as defects in silicon bonding inside the silicon layer or at an interface between the silicon layer and the gate insulating layer or the insulating substrate. As disclosed in Japanese Unexamined Patent Publication Nos. 60-136259, 61-46069, and 7-78997, if higher-temperature heat treatment, so-called hydrogenation, is carried out under such condition that a film suppressing diffusion of hydrogen is formed as an upper layer, the dangling bonds are eliminated by being bound to hydrogen atoms in the films forming the TFT.
The aforementioned upper insulating layer also functions as the film suppressing the diffusion of hydrogen. Therefore, as the upper insulating layer, a silicon nitride film or the like formed by plasma Chemical Vapor Deposition (CVD) is used. Here, the plasma CVD film covers stepped portions of lines and irregularities on the surface of the interlayer insulating layer, so a fissure or coverage failure tends to occur at these stepped portions and uneven portions due to concentrated stress. If the fissure or coverage failure occurs, hydrogen disperses therefrom upon heat treatment, with the result that the hydrogen concentration around the fissure or coverage failure locally drops. This leads to a problem in that the dangling bond density becomes nonuniform in the thin film transistor structure after the heat treatment, and a threshold voltage, carrier mobility, or other such performances of the thin film transistor vary.